I am a Research Assistant Professor in the College of Computing at Illinois Tech, where I work closely with Prof. Xian-He Sun at Gnosis Research Center. My research spans several areas in Computer Architecture and High-Performance Systems, with a particular focus on optimizing memory hierarchies, enhancing data-centric designs, leveraging AI to improve system performance, and enabling efficient algorithm-hardware co-design.

Email: xlu40@illinoistech.edu

Click here to see the up-to-date version of my CV.

Prospective students: I am looking for self-motivated students interested in computer architecture and working together at Gnosis Research Center. If you are interested, please feel free to email me your resume and transcripts.

Research Interests

I conduct research in Computer Architecture and High-Performance Systems, focusing on:

• Memory performance modeling
• Cache/memory performance optimizations
• Data-centric design for computer architecture
• AI-assisted design for computer architecture (AI for Systems)
• Efficient algorithm-hardware co-design for AI (Systems for AI)

Updates

• Jun 2025: I serve as a Shadow PC member for Eurosys 2026.
• May 2025: Our paper ProMiner: Enhancing Locality, Parallelism, and Offloading for Graph Mining on Processing-in-Memory Systems was accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems! Congrats to all collaborators!
• Apr 2025: Our paper Concurrency-Aware Cache Miss Cost Prediction with Perceptron Learning was accepted by GLSVLSI 2025! Congrats to all collaborators!
• Apr 2025: I serve as a TPC member for ICCD 2025.
• Apr 2025: Our paper Pyramid: Accelerating LLM Inference with Cross-Level Processing-in-Memory was accepted by IEEE Computer Architecture Letters! Congrats to all collaborators!
• Aug 2024: Our paper AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache System was accepted by ICCD 2024! Congrats to all collaborators!
• Feb 2024: Our paper ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache Optimizations was accepted by ASPLOS 2024! Congrats to all collaborators! (Acceptance rate: 11.5%)

Recent Visit